1. Field of the Invention
The invention relates to a level shift circuit which outputs a signal having a larger amplitude than that of an input signal, and a signal drive circuit, a display device, and an electronic device each having the level shift circuit.
2. Description of the Related Art
In recent years, a complementary metal-oxide semiconductor process, capable of forming both an N-channel metal oxide semiconductor (which may be hereinafter simply referred to as a “MOS”) transistor and a P-channel MOS transistor, has been often used for a process of manufacturing an integrated circuit. A CMOS circuit manufactured using the CMOS process allows the N-channel MOS transistor and the P-channel MOS transistor to operate complementary. Such a CMOS circuit makes it possible to achieve low-power consumption, since a through-current does not flow between a power source and ground.
There are some processes that are capable of forming either the N-channel MOS transistor or the P-channel MOS transistor only. For example, in many cases, processes such as an oxide semiconductor process, a micro-silicon (μ-Si) process, and an amorphous silicon (A-Si) process are capable of forming only the N-channel MOS transistor, whereas processes such as an organic thin-film transistor (TFT) process are capable of forming only the P-channel MOS transistor. Also, processes such as a single-crystal silicon process and a low-temperature polysilicon process are normally capable of forming both the N-channel MOS transistor and the P-channel MOS transistor, although those processes may sometimes be adapted to form only either of the N-channel MOS transistor or the P-channel MOS transistor for a purpose of reducing the number of process steps associated with cost reduction. In these cases, a circuit is thus structured by MOS transistors of a single channel (i.e., structured by the MOS transistors of the same conduction type), as disclosed, for example, in Japanese Unexamined Patent Application Publication No. 2005-149624 (JP2005-149624A).
For example, JP2005-149624A proposes a shift resistor circuit utilizing the single-channel MOS transistors. The disclosed circuit operates the two single-channel MOS transistors, which are connected in series between a power source and ground, in a complementary fashion to prevent the through-current from flowing, thereby achieving a reduction in power consumption.